Present invention relates to an information processing apparatus which performs parallel data processing by, e.g., using a plurality of processors.
Conventional information processing apparatuses such as a computer system include a multi-processor system comprising a plurality of processors, as well as a general system comprising a single processor. The multi-processor systems include a shared memory type multi-processor system where a plurality of processors share a memory, a calculation pipeline system where processors are connected with a pipeline and an area dividing type multi-processor system where an image memory is divided into a plurality of small storage areas respectively assigned to processors.
Recently, in processing continuous digital data such as digital video data, which must be processed within a limited time period, a need for using a general-purpose computer system for processing such data in real time is arising. Such digital data is real-time data which requires processing to be completed within a predetermined period.
For example, in a case where digital video data of 480.times.640 dots in accordance with the currently standard NTSC specifications is processed in real time, i.e., 30 frames per second, the above-mentioned conventional single-processor type computer system cannot perform processing at a calculation speed required.
In the shared memory type multi-processor system, access conflict occurs to a memory system upon inputting/outputting and displaying data or processing by the plurality of processors, thus disturbing high-speed processing.
In a pipeline processing system where data processing is performed in fine-grain data units, the amount of data to be transferred at once on a data transfer path between calculation stages is small, typically one word. Further, systems generally have no large capacity memory for random access in pipeline processing respective stages. For these reasons, this system cannot perform high-speed real-time processing when the amount of data to be processed simultaneously is large and continuous such as processing data on digital video images.
In addition to the above systems, an image-area dividing type multi-processor system where image data is divided into a plurality of areas to be assigned to a plurality of processors for high-speed image processing is known. This system usually have a memory system divided into many independent small areas to raise processing speed after data to be processed is loaded onto the memory. In this system, continuous processing of digital video data in actual executing time is impossible due to long data loading/read-out time.